A Cmos Self-Triggered Gated Integrator Circuit For Sipm Readout In Spect Applications

Energy resolution plays a major role in multi-tracer SPECT detectors, as spectral lines emitted by different radionuclides have to be distinguished. In the electronic circuit for the readout of SiPMs used in a SPECT system, the processing filter choice is therefore essential to provide the best achievable energy resolution. Gated integrator filter was identified as an excellent candidate for this kind of application, mainly thanks to its capability to reduce ballistic deficit in the signal processing, allowing for a quasi-complete light collection with a filtering time considerably shorter with respect to the ones needed by time-invariant circuits. A single-channel prototype circuit in CMOS 0.35 mu m technology was developed to validate preliminary studies. The circuit features a current buffer input stage with the possibility to tune the input voltage in a 1 V range with 6 bit resolution and a filtering section to integrate the signal rejecting the baseline component originated by the dark count current of the SiPM. A discriminator block recognises the arrival of the signal and initiates the integration phase; a control section generates the gating interval, selectable in a range between 80 ns and 15 mu s to cope with various scintillator types, and manages the different timing phases of the circuit. A comparison between the energy resolution achievable using both a time invariant RC filter and a gated integrator one is done, showing, for the latter, a better expected energy resolution performance at the 140 keV Tc-99m peak. Preliminary experimental results of the prototype when coupled to a SiPM are reported.