Design of digital general-purpose PSO processor

2016 24TH IRANIAN CONFERENCE ON ELECTRICAL ENGINEERING (ICEE)(2016)

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摘要
Distinguished features of Particle Swarm Optimization (PSO) algorithm have been made it a powerful tool to deal with challenging optimization problems. Almost all of the previous implantations of PSO are in the FPGA or software frameworks. Long execution time is the main reason why these works are deficient for real-time applications. Instead, CMOS is a favorable alternative from delay and area point of view. In this paper a 16 bits digital general purpose PSO processor is designed in the 0.18 μm CMOS technology. Proposed processor is designed for one-dimensional problems and can be expanded to more dimensions depending on the application. Some control pins are included for easy adjusting of processor's swarm size, fitness resolution and number of iterations. Time domain simulation has been carried out using Hspice by 0.18μm standard CMOS technology to validate the effective performance of the proposed processor.
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关键词
Particle swarm optimization, CMOS technology, Hardware implementation, Digital design
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