Compact modeling of dynamic trap density evolution for predicting circuit-performance aging.

It is shown that a compact MOSFET-aging model for circuit simulation is possible by considering the dynamic trap-density increase, which is induced during circuit operation. The dynamic trap/detrap phenomenon, which influences the switching performance, is also considered on the basis of well-known previous results. Stress-dependent hot-carrier effect and NBTI effect, origins of the device aging, are modeled during the circuit simulation for each device by integrating the substrate current as well as by determining the oxide-field change due to the trapped carriers over the individual stress-duration periods. A self-consistent solution can be obtained only by iteratively solving the Poisson equation including the dynamically changing trap density, which is achieved with negligible simulation time penalty. To enable accurate circuit-aging simulation, even for high-voltage MOSFETs, the carrier traps within the highly resistive drift region are additionally considered.