Mitigating Simple Power Analysis Attacks On Lsib Key Logic

Locking Segment Insertion Bits (LSIBs) have been proposed to secure access to on-chip embedded instruments in IEEE 1687 networks. LSIBs can be opened (or closed) only if the correct key value is applied to the LSIB's key logic circuit. Using gate-level simulations previously used for cryptographic circuits, we evaluate the susceptibility of several LSIB key logic designs to simple power analysis attacks. We show that the key logic may be susceptible to simple power analysis attacks when the key logic for each LSIB is separate. However, sharing the key logic among multiple LSIBs mitigates simple power analysis attacks. Sharing key logic circuits among four LSIBs gave an average coefficient of determination of 0.05 between the circuit's switching activity and the key bit values as compared to an average coefficient of determination value of 0.54 for single LSIBs. Furthermore, this reduced the scan cell overhead for LSIBs by a factor of four.