Flexible Transition Metal Dichalcogenide Field-Effect Transistors: A Circuit-Level Simulation Study Of Delay And Power Under Bending, Process Variation, And Scaling

In this paper, a new and efficient SPICE model of flexible transition metal dichalcogenide field-effect transistors (TMDFETs) is developed for different types of materials, considering effects when scaling the transistor size down to the 16nm technology node. Extensive circuit-level simulations are performed using this model, and the delay and power performance of TMDFET circuits with different amounts of bending are reported. Simulation results indicate that delay and power tradeoff can be done in TMDFET circuits via bending. Effects from process variation are also evaluated via circuit simulations. Finally, our cross-technology and scaling studies show that while TMDFETs perform better than Si-based transistors in terms of energy-delay product (EDP) at 180-nm and 90-nm technology nodes (the best being 12.7% and 40.7% of that of Si-based transistors, respectively), their EDPs are worse than Si-based transistors (at least 4.9 of that of the best performing Si-based transistor) on the 16-nm technology node. Such a compact model would enable SPICE-level circuit simulation for early assessment, design, and evaluation of futuristic TMDFET-based flexible circuits targeting advanced technology nodes.