Characterization of nanotransistors in a semiempirical model

In a series of recent papers we have established a semiempirical model for quantum transport in a nanotransistor. Here we apply this model to characterize four industrial transistors with gate lengths ranging between 22nm and 30nm finding excellent quantitative agreement between theory and experiment. Adjusting our semiempirical model to the experimental output traces, three calibration parameters are found: First, the height of the source–drain barrier, second, the device temperature, and, third, the overlap parameter. The overlap parameter describes the wave function overlap between the source/drain contact and the conduction channel. With the aid of the calibration parameters the considered devices can be classified in three groups: A first group (G1) with good contact-channel coupling and a high saturation current, a second group (G2) with intermediate values and a third group (G3) with poor contact-channel coupling and a small saturation current. We calculate the gate capacitance of the transistors: At threshold voltage a peak of the gate capacitance is observed which is associated with a jump in the overlap parameter. This finding is most pronounced in G1, weaker in G2 and absent in G3. We attribute it to favorable screening conditions in G1 leading to a smooth transition between the contacts and the conduction channel. Our results indicate that this screening effect is favored by an efficient release of the Ohmic heat.