Automatically-retargetable model-driven tools for embedded code inspection in SoCs

Midwest Symposium on Circuits and Systems Conference Proceedings(2007)

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摘要
SoC design asks for tools to inspect embedded code and to pinpoint its bugs. Since design exploration may require that the code execute in distinct candidate processors, inspection tools must be retargeted. Besides, the time-to-market pressure makes automatic retargeting mandatory. This can be accomplished through tool generation from a formal model of each target processor, written in some architecture description language (ADL). This work extends a binary utility generator based upon the ArchC ADL by providing a technique for automatically retargeting disassemblers and debuggers. For experimental validation, we relied on the well-known MiBench and Dalton benchmarks. The results obtained from our retargeted tools and those from native tools were compared for distinct RISC and CISC architectures (i8051, MIPS, SPARC and PowerPC).
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关键词
hardware description languages,system on chip,architecture description language
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