Embedded Linux for concurrent dynamic partially reconfigurable FPGA systems
Adaptive Hardware and Systems（2012）
摘要
Dynamic Partial Reconfiguration (DPR) of Field Programmable Gate Arrays (FPGAs) is a technology that enables the development of embedded systems with hot swappable logic on the FPGA fabric. This means that hardware logic can be swapped in and out on-the-fly while the rest of the system is operational. Since DPR is relatively new, tool support is still evolving. This paper introduces new FPGA architectural tools and Linux OS modifications that aid in supporting DPR on FPGAs for control. We emphasize that control systems benefit from real hardware concurrency, meaning that by moving the control intelligence into hardware we minimize the negative effects inherent to threads and their scheduler. This leaves software with the role of a high-level administrator rather than an executor, thus eliminating unnecessary bottlenecks. The developed tools enable the hardware engineer to develop DPR-FPGA systems more effectively for rapid control system development.
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关键词
Linux,control engineering computing,embedded systems,field programmable gate arrays,reconfigurable architectures,system-on-chip,DPR,DPR-FPGA systems,FPGA architectural tools,FPGA fabric,Linux OS modification,SoC design,concurrent dynamic partially reconfigurable FPGA system,control intelligence,control systems,embedded Linux,embedded operating system,embedded system development,field programmable gate arrays,hardware concurrency,hardware logic swapping,high-level administrator,minimization,system-on-chip,Adaptive Hardware,Control Systems,Dynamic Partial Reconfiguration,Embedded Linux,Field Programmable Gate Arrays,Hardware Concurrency,SoC Design
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