Stress voiding characteristics of Cu/low K interconnects under long term stresses

Reliability Physics Symposium(2012)

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摘要
Stress migration has been treated as one of the major reliability concerns for advanced interconnects. Extensive studies and various semi-empirical models have been reported. However, most of these models were developed based on fairly short term (1000 hours or less) stress data. In this paper, we present long term stress results (up to 20,900 hours) on a wide range of layout geometries. The observed stress migration behaviors for different layouts can be classified into four types: I: voiding rate is predominately driven by chemical potential gradient, and it increases with temperature; II: voiding rate is dominated by the combination of stress and chemical potential gradients, and it reaches the peak at intermediate stress temperature; III: voiding behavior shows defect-like characteristics, with a portion of the samples showing open circuit failures; and IV: voiding rate is very low, virtually no resistance change is seen at all stress temperatures. We conclude that to thoroughly investigate stress voiding characteristics, long term stresses with a wide range of layout geometries are needed.
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关键词
copper,integrated circuit interconnections,integrated circuit reliability,stress analysis,stress effects,cu/low k interconnects,chemical potential gradient,defect-like characteristics,intermediate stress temperature,layout geometries,long term stresses,open circuit failures,reliability,resistance change,semiempirical models,stress migration behaviors,stress temperatures,stress voiding characteristics,cu diffusion,low k interconnect,stress migration,void,geometry,mathematical model,layout,stress,temperature,resistance
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