Using FPGA technology towards the design of an adaptive fault tolerant framework

Systems, Man and Cybernetics, 2005 IEEE International Conference(2005)

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摘要
In this paper we propose architecture for a reconfigurable, adaptive, fault-tolerant (RAFT) framework for application in real time systems with require multiple levels of redundancy and protection. Typical application environments include distributed processing, fault-tolerant computation, and mission and safety-critical systems. The framework uses field programmable gate array (FPGA) technologies with on the fly partial programmability achieving reconfiguration of a system component when the existing components fail or to provide extra reliability as required in the specification. The framework proposes the use an array of FPGA devices to implement a system that, after detecting an error caused by a fault, can adoptively reconfigure itself to achieve fault tolerance. The FPGAs that are becoming widely available at a low cost are exploited by defining a system model that allows the system user to define various levels of reliability choices, providing a monitoring layer for the system engineer.
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关键词
fault tolerant computing,field programmable gate arrays,reconfigurable architectures,FPGA,distributed processing,fault-tolerant computating,field programmable gate array,fly partial programmability,mission-critical system,real time systems,reconfigurable adaptive fault-tolerant framework,reliability,safety-critical system,FPGA,Fault Tolerance,Modeling,reconfigurable
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