A 26.5 Gb/s optical receiver with all-digital clock and data recovery in 65nm CMOS process

Sanghyeok Chu,Woorham Bae,Gyuseob Jeong,Jiho Joo,Gyungock Kim,Deogkyoon Jeong

A-SSCC（2014）

引用 6|浏览32

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摘要

This paper presents a 26.5 Gb/s optical receiver with an all-digital CDR (ADCDR) fabricated in a 65 nm CMOS process. The receiver consists of a transimpedance amplifier (TIA), a limiting amplifier (LA), and a half-rate ADCDR. The TIA and LA are based on an inverter-based amplifier for low power consumption. The ADCDR adopts an LC quadrature digitally controlled oscillator (LC-QDCO) for the quadrature sampling. The recovered clock jitter is 1.28 psrms and the measured jitter tolerance exceeds the tolerance mask specified in IEEE 802.3ba. The receiver sensitivity is measured to be -9 dBm and -6.6 dBm for the data rate of 25 Gb/s and 26.5 Gb/s, respectively. The whole receiver chip occupies an active area of 0.75 mm2 and consumes 254 mW at the data rate of 26.5 Gb/s.

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关键词

cmos digital integrated circuits,clock and data recovery circuits,integrated optoelectronics,jitter,low-power electronics,optical receivers,cmos process,ieee 802.3ba,la,lc quadrature digitally controlled oscillator,lc-qdco,tia,all-digital cdr,all-digital clock and data recovery,bit rate 25 gbit/s,bit rate 26.5 gbit/s,half-rate adcdr,inverter-based amplifier,limiting amplifier,low power consumption,optical receiver,power 254 mw,quadrature sampling,receiver sensitivity,recovered clock jitter,size 65 nm,time 1.28 ps,tolerance mask,transimpedance amplifier,lc oscillator,all-digital clock and data recovery (adcdr),optical,quadrature digitally controlled oscillator (qdco),receiver,transimpedance amplifier (tia),cmos integrated circuits,oscillators,optical amplifiers

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