5nm FinFET Standard Cell Library Optimization and Circuit Synthesis in Near-and Super-Threshold Voltage Regimes
ISVLSI（2014）
摘要
FinFET device has been proposed as a promising substitute for the traditional bulk CMOS-based device at the nanoscale, due to its extraordinary properties such as improved channel controllability, high ON/OFF current ratio, reduced short-channel effects, and relative immunity to gate line-edge roughness. In addition, the near-ideal subthreshold behavior indicates the potential application of FinFET circuits in the near-threshold supply voltage regime, which consumes an order of magnitude less energy than the regular strong-inversion circuits operating in the super-threshold supply voltage regime. This paper presents a design flow of creating standard cells by using the FinFET 5nm technology node, including both near-threshold and super-threshold operations, and building a Liberty-format standard cell library. The circuit synthesis results of various combinational and sequential circuits based on the 5nm FinFET standard cell library show up to 40X circuit speed improvement and three orders of magnitude energy reduction compared to those of 45nm bulk CMOS technology.
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关键词
finfet standard cell library optimization,superthreshold supply voltage regime,sequential circuits,power consumption,combinational circuits,vlsi,standard cell library,near-threshold computing,energy reduction,cmos logic circuits,circuit speed,circuit optimisation,low-power electronics,near-ideal subthreshold behavior,size 5 nm,integrated circuit design,circuit synthesis,bulk cmos technology,finfet,5nm technology,performance,finfet, 5nm technology, standard cell library, near-threshold computing, power consumption, performance,mosfet,cmos integrated circuits,low power electronics,logic gates
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