A Fast And Accurate Automatic Frequency Calibration Scheme For Frequency Synthesizer

2013 IEEE 10TH INTERNATIONAL CONFERENCE ON ASIC (ASICON)(2013)

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摘要
A fully integrated 2.8-3.4 GHz frequency synthesizer that employs a novel automatic frequency calibration (AFC) is presented. The AFC is consists of a frequency error detector (FED) and a finite state machine (FSM). The error between VCO output frequency and the target frequency is calculated quickly and accurately due to the novel topology of PED which employs a utility phase detector (PD). Then a binary search algorithm is used by FSM to adjust capacitor's code according to the frequency error. Finally the center frequency which is closest to the target frequency is found out as the optimal tuning curve. The total calibration cost only 0.611 mu s. The frequency synthesizer is fabricated in 0.18-mu m CMOS process and exhibits phase noise of -87.72 dBc/Hz at 10 KHz offset and -95.28 dBc/Hz at 100 kHz offset, while consuming 18 mW from a 1.8 V supply.
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关键词
frequency synthesizer, automatic frequency calibration, phase-locked loop
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