Digital bilinear feedback for low-power double-sampling sigma–delta modulators

Electronics Letters  (2015)

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摘要
A novel double-sampling (DS) technique for use in sigma-delta modulators (ΣΔMs) is presented. The proposed technique uses a digital bilinear filter in the feedback path of the modulator loop. The bilinear filter suppresses the quantisation noise folding (QNF) that results from the DS path mismatch. Unlike other solutions for the QNF, the digital implementation of this filter allows the sharing of the input sampling capacitor with the feedback sampling capacitor without any additional analogue gain stages. This way, the power consumption in the input signal buffer can be greatly reduced, because it benefits from the nullator effect at the input of the ΣΔM loop, and hence the current needed to drive the shared sampling capacitor is drastically reduced. Moreover, the proposed DS technique is also suitable for a single-ended circuit implementation of DS.
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关键词
circuit feedback,circuit noise,digital filters,interference suppression,low-power electronics,power consumption,sigma-delta modulation,qnf,digital bilinear feedback,digital bilinear filter,double-sampling path mismatch,feedback path,feedback sampling capacitor,input sampling capacitor,input signal buffer,low-power double-sampling sigma-delta modulators,modulator loop,quantisation noise folding suppression,single-ended circuit,low power electronics,amplifiers
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