Contact pitch and location prediction for Directed Self-Assembly template verification

ASP-DAC(2015)

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摘要
Directed Self-Assembly (DSA) is a promising technique for contacts/vias patterning in 7 nm technology nodes. In DSA process, groups of contact holes/vias are generated by the self-assembly process guided by the `guiding templates'. The guiding templates are patterned by conventional optical lithography process such as 193 nm immersion lithography. As a result, the patterning fidelity and variation in the template shapes is very likely to affect the final contact holes/vias. While feasible in principle, rigorous DSA process simulation is unacceptably slow for full chip verification in practice. This paper proposes a machine learning based verification that can predict the pitch size of the contact holes and the hole centers. Given a set of training data that consists of simulated template and contact hole patterns, our method is able to learn a highly accurate predictive model for pitch size and hole location. To build a statistical model for prediction, we utilize computer vision techniques to extract various geometric and image features. We conduct extensive experiments to explore the effectiveness of the proposed features, and compare several machine learning algorithms to achieve an effective and efficient prediction. The experimental results show that compared to the minutes or even hours of simulation time in rigorous methods, our best prediction model achieves very promising results (RMSE = 0.135 pitch grid) with less than one second of training and predicting runtime overhead.
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关键词
pitch grid,dsa process simulation,contact hole patterns,nanolithography,photolithography,rmse,directed self-assembly template verification,machine learning algorithms,statistical analysis,learning (artificial intelligence),pitch size,guiding templates,self-assembly process,image features,location prediction,size 193 nm,self-assembly,machine learning based verification,contact pitch,computer vision techniques,contact holes,optical lithography process,nanopatterning,vias,computer vision,immersion lithography,contacts-vias patterning,full chip verification,size 7 nm,hole location,patterning fidelity,prediction model,electronic engineering computing,predictive model,mean square error methods,root mean squared error,statistical model
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