Self-adaptive quasi-Gaussian circuits for analog on-chip-trainable multi-class classifiers

ISCAS(2012)

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摘要
Self-adaptive quasi-Gaussian circuits have been developed and introduced to an analog multi-class classifier in order to enhance its classification performance. By applying a floating threshold scheme to the quasi-Gaussian kernel, the kernel can extend its tail region adaptively according to the characteristics of input data. As a result, the misclassification problem due to the zero tail region in the quasi-Gaussian kernel has been completely eliminated, and the classification accuracy is significantly improved. Software simulation showed the performance is comparable to complex Gaussian-kernel Support Vector Machines. A proof-of-concept chip implementing an analog on-chip-trainable multi-class classifier which employs 64-dimensional self-adaptive quasi-Gaussian circuits was designed in a 0.18-μm CMOS technology and is now under fabrication. Its successful operation was confirmed by Nanosim simulation.
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关键词
64-dimensional self-adaptive quasigaussian circuits,cmos analogue integrated circuits,software simulation,floating threshold scheme,nanosim simulation,on-chip-trainable multiclass classifiers,quasigaussian kernel,analogue integrated circuits,analog multiclass classifiers,cmos technology,size 0.18 mum,misclassification problem,zero tail region,floating point arithmetic,simulation,accuracy,vectors,kernel,very large scale integration,support vector machines
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