Using memory profile analysis for automatic synthesis of pointers code

ACM Trans. Embedded Comput. Syst.(2013)

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摘要
One of the main advantages of high-level synthesis (HLS) is the ability to synthesize circuits that can access multiple memory banks in parallel. Current HLS systems synthesize parallel memory references based on explicit array declarations in the source code. We consider the need to synthesize not only array references but also memory operations targeting pointers and dynamic data structures. This paper describes Automatic Memory Partitioning, a method for automatically synthesizing general data structures (arrays and pointers) into multiple memory banks for increased parallelism and performance. We use source code instrumentation to collect memory traces in order to detect linear memory access patterns. The memory traces are used to split data structures into disjoint memory regions and determine which segments may benefit from parallel memory access. We present an algorithm for allocating memory segments into multiple memory banks. Experiments show significant improvements in performance while conserving the number of memory banks.
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关键词
disjoint memory region,parallel memory access,linear memory access pattern,pointers code,automatic synthesis,memory segment,memory trace,parallel memory reference,memory operation,multiple memory bank,memory bank,data structure,memory profile analysis,memory banks,reconfigurable computing
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