Rapid implementation of the MAC and interface circuits for the wireless LAN cards using FPGA.

Journal of Communications and Networks(1999)

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摘要
This paper studies the rapid design and implementation of the medium access control (MAC) and related interface circuits for 802.11 wireless LANs based on the field programmed gate array (FPGA) technology. Our design is thus aimed to support both the distributed coordination function (DCF) and the point coordination function (PCF) with the aid of FPGA technology. Furthermore, in an infrastructure network, some stations may serve as the access points (APs) which may function like a learning bridge. This paper will also discuss how to design for such application. The hardware of the MAC and interface may at least consist of three major parts: wireless transmission and reception processes and interface, host (bus) interface, and the interface to the distributed system (optional). Through the increasing popularity of FPGA design, this paper presents how Complex Programmable Logic Devices (CPLD) can be utilized for speedy design of prototypes. It also demonstrates that there is much room for low-cost hardware prototype design to accelerate the processing speed of the MAC control function and for field testing.
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关键词
Random access memory,Media Access Protocol,IEEE 802.11 Standards,Field programmable gate arrays,Process control,Receivers
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