Fast Transistor Threshold Voltage Measurement Method for High-Speed, High-Accuracy Advanced Process Characterization

IEEE Transactions on Very Large Scale Integration Systems(2014)

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摘要
As process technologies continually advance, process variation has greatly increased and has gradually become one of the most critical factors for IC manufacturing. Furthermore, these increasingly complex processes continue to make greater use of stressors for mobility enhancement, thus requiring large volumes of data for extensive characterization of layout-dependent effects (LDE) for validation of both SPICE models and design for manufacturing. Transistor threshold voltage (Vt) is a commonly used parameter both for characterization during process development and for monitoring of volume manufacturing. To adequately quantify local process variation or LDE, Vt must be measured for a sufficiently large number of device-under-tests (DUTs) to obtain a statistically representative sample population. The number of Vt measurements required to obtain such a statistically significant result, however, requires extremely long testing time, especially for array-based test structure designs including thousands of DUTs. In this paper, we present a very fast threshold voltage measurement methodology using an operational amplifier-based source-measure unit test configuration, which greatly improves testing efficiency and accuracy, and is not sensitive to process variation. The proposed test methodology can improve Vt testing time by a factor of 5-10 relative to the commonly used binary-search algorithm, and by a factor of ~2 relative to an optimized interpolation algorithm, and achieves better accuracy (standard deviation of Vt = 0.15 mV, versus typical accuracy of ~ 0.5 mV for the two algorithms mentioned). Furthermore, the layout and configuration of conventional test structures need not be modified to adapt the proposed methodology. The measured results from the most advanced process technology nodes demonstrate the testing efficiency and accuracy of the proposed test structure in characterizing the large number of DUTs re- uired for quantifying process variation or LDEs.
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关键词
mobility enhancement,optimized interpolation algorithm,local process variation,semiconductor device measurement,device-under-tests,interpolation,voltage measurement,variation,test structures,operational amplifiers,threshold voltage,design for manufacturing (dfm),spice models,fast transistor threshold voltage measurement method,search problems,semiconductor device testing,layout-dependent effects,ic manufacturing,array-based test structure designs,fets,operational amplifier-based source-measure unit test configuration,binary-search algorithm,volume manufacturing monitoring,high-speed high-accuracy advanced process characterization,mosfet,design for manufacturing,duts,lde characterization,advanced process technology nodes,accuracy,logic gates,binary search algorithm,transistors
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