The Design and Simulation of a VCO in CMOS Digital PLL
ICICTA '11 Proceedings of the 2011 Fourth International Conference on Intelligent Computation Technology and Automation - Volume 02（2011）
摘要
According to the structure and principle of PLL (Phase-Locked Loop) and system's stability, capture range and lock-up time, the VCO unit is designed. Based on 0.5µm CMOS mixed signal technology, Hspice is used to design and simulate the circuit. After designing the layout, Calibre is used to extract parasitic parameter and analyze the result of post-simulation. Applying the VCO (Voltage Controlled Oscillator) can realize the function of digital PLL and it also can be used as an independent IP hard core in the clock recovery of communication systems and frequency synthesis of digital system.
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关键词
digital pll,cmos digital pll,phase-locked loop,lock-up time,voltage controlled oscillator,communication system,vco unit,independent ip hard core,digital system,clock recovery,frequency synthesis,design,oscillators,phase locked loop,simulation,synchronization,phase locked loops,indexation,layout,indexes,frequency synthesizer,phase lock loop
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