Algorithms for Library-Specific Sizing of Combinational Logic.
DAC（1990）
摘要
ABSTRACTWe examine the problem of choosing the proper sizes from a cell library for the logic elements of a Boolean network to meet timing constraints on the propagation delay along every path from the primary input to the primary output. If the Boolean network has a tree topology, we show that there exists a pseudo-polynomial time algorithm for finding the optimal solution to this problem. A backtracking-based algorithm for finding feasible solutions for networks that are not trees is also suggested and evaluated.
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关键词
Boolean functions,combinatorial circuits,logic CAD,trees (mathematics),Boolean network,backtracking-based algorithm,cell library,combinational logic,library-specific sizing,logic elements,propagation delay,pseudo-polynomial time algorithm,timing constraints,tree topology,
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