Embedded Test Solution as a Breakthrough in Reducing Cost of Test for System on Chips

The cost of test for SoCs (System-on-Chips) istremendous, especially for large and complex designs.Although the high price of ATE (Automatic TestEquipment) is recognized as the primary contributor oftest cost, and is therefore most highlighted, high testcosts are also caused by factors related to engineeringflows ranging from design to manufacturing. In thispaper, the discussion will focus on test cost reduction,with all such factors taken into account. A potentialdifficulty in this discussion is that it is generally difficultto achieve higher quality and lower cost at the same time.In working with several leading edge semiconductorcompanies in the United States and Japan, the authorshave observed and analyzed the whole picture of currentflows in design and manufacturing test, includingquantitative study of the cost of test. Based upon theresults of this analysis, a proposed solution is analyzed,based upon effectiveness in achieving two goals: higherquality and lower costs.