A fast algorithm for minimizing the Elmore delay to identified critical sinks

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems(1997)

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摘要
A routing algorithm that generates a Steiner route for a set of sinks with near optimal Elmore delay to the critical sink is presented. The algorithm outperforms the best existing alternative for Elmore-delay-based critical sink routing. With no critical sinks present, the algorithm produces routes comparable to the best previously existing Steiner router. Since performance-oriented layout generators employ iterative techniques that require a large number of calls to the routing algorithm for layout evaluation, a fast algorithm for routing is desirable. The algorithm presented here has a fast (O(n2), where n is the number of points) and practical implementation using simple data structures and techniques
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关键词
circuit layout,circuit optimisation,delays,iterative methods,minimisation,network routing,Elmore delay minimization,Steiner route,critical sink,iterative technique,performance-oriented layout generator,routing algorithm
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