An integrated design flow for a via-configurable gate array

In This work we present a complete physical design flow for a via-configurable gate array (VCGA). The VCGA is an array of prefabricated logic blocks and fixed metal masks. The block consists of via-configurable functional cells and a via-decomposable flip-flop. An M1-M2 via mask is used to define the block's functionality. Interconnects are customized using via masks. We developed a physical design flow for VCGA, which integrates a set of effective techniques. Here, we highlight the packing, cell-binding, and detailed-routing problems. We use our design flow to compare the VCGA-based and standard-cell/FPGA-based designs. Experimental results show the efficiency of our flow.