Geiger-mode avalanche photodiode arrays fabricated on SOI engineered-substrates

Arrays of Geiger-mode avalanche photodiodes (GmAPDs) are fabricated on a new type of engineered substrates with an epitaxial layer grown on silicon-on-insulator (SOI) wafers. The SOI-based structure facilitates rapid die-level bump bonding of the GmAPD array to a CMOS readout integrated circuit (ROIC) followed by substrate removal to make a back-illuminated image sensor. To fabricate the engineered substrate, a commercial substrate with a 70-nm-thick SOI layer is implanted with BF2 ions to create a p+-doped passivation layer on the light illumination surface. Subsequently, a lightly p-doped silicon layer on which the GmAPD will be fabricated is grown using a homoepitaxy process. This approach allows for the use of chip-level hybridization to CMOS, avoiding the high cost and demanding wafer flatness and smoothness requirements of wafer-scale 3D integration processes. The new process yields cleaner wafers and allows for tighter control of detector layer thickness compared to the previous process. GmAPDs fabricated on 5-mu m-thick epitaxial silicon have over 70% photon detection efficiency (PDE) when 532 nm light is focused into the center 3 mu m of the device with an oxide layer that remains after substrate removal. With an anti-reflective coating, the PDE can be improved.