Atomistic Simulation of Nanodevices

As the dimensions of electronic devices, especially transistors, are getting smaller and smaller, novel modeling approaches must be developed to reveal the physics and predict the performance of not-yet-fabricated ultra-scaled components. In this paper the basic requirements to simulate nanoscale devices are first reviewed before introducing a hierarchical quantum transport approach going from empirical to ab-initio models. It is illustrated with three examples, a Si nanowire transistor treated within nearest-neighbor tight-binding (TB), a 2-D logic switch based on transition metal dichalcogenides and investigated with an hybrid scheme combining the advantages of TB and density-functional theory, and finally a silver nano-filament explored at the first-principles level. The importance of dissipative effects such as electron-phonon scattering is discussed in all applications.