MaPU: A Novel Mathematical Computing Architecture

Donglin Wang,Shaolin Xie,Zhiwei Zhang,Xueliang Du, Lei Wang,Zijun Liu,Xiao Lin, Jie Hao,Leizu Yin,Tao Wang, Yongyong Yang, Chen Lin,Hong Ma, Zhonghua Pu,Guangxin Ding,Wenqin Sun,Fabiao Zhou,Weili Ren,Huijuan Wang, Mengchen Zhu, Lipeng Yang, NuoZhou Xiao, Qian Cui, Xingang Wang,Ruoshan Guo, Xiaoqin Wang

2016 IEEE International Symposium on High Performance Computer Architecture (HPCA)（2016）

Cited 23|Views47

Key words

mathematical computing architecture,semiconductor process,high performance processors,PLOPS,power consumption,power efficiency,sustained performance,MaPU architecture,data-intensive computing,innovative multigranularity parallel memory system,intrinsic shuffle ability,cascading pipelines,wide SIMD data path,state-machine-based program model,signal processing algorithm,single MaPU core,GLOPS,CPU,GPGPU

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