PAGR: Accelerating Global Routing for VLSI Design Flow

Roman A. Solovyev, Ilya A. Mkrtchan,Dmitry V. Telpukhov, Ilya I. Shafeev,Aleksandr Y. Romanov, Yevgeniy V. Stolbikov, Alexander L. Stempkovsky

IEEE ACCESS（2025）

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关键词

Routing,Circuits,Wires,Metals,Capacitance,Very large scale integration,Steiner trees,Scalability,Graphics processing units,Benchmark testing,Design flow,global routing,ISPD contest,matrix reduction,Steiner tree,VLSI

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