Demonstration of a Ternary Inverter Based on the Novel TDDFET with Dual-Doped Source and Asymmetric Gates
IEEE TRANSACTIONS ON NANOTECHNOLOGY（2025）
Key words
Inverters,Logic gates,Voltage,Lead,Tunneling,TFETs,Power demand,Multivalued logic,Electric fields,Symbols,Tunneling and drift-diffusion field-effect transistor,standard ternary inverter,noise margin,voltage transfer curve,ternary logic
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