A 0.05–1.5-Ghz PVT-Insensitive Digital-to-Time Converter for QKD Applications
IEEE Trans Very Large Scale Integr Syst（2025）
关键词
Delays,Generators,Inverters,Signal resolution,Delay lines,Clocks,Logic gates,Coarse delay-locked loop (DLL),deskewing,digital-to-time converter (DTC),fine DLL,integral nonlinearity (INL),subgate resolution
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