Integration of Si-Interposer and High Density MIM Capacitor on 2.5D Foveros Face-to-Face Architecture
Christopher Pelto, R. Aggarwal, R. Ahan,M. Armstrong, M. Bebek, M. Blount, S. Chowdhury, J. Chuah,C. Connor, T. DeBonis, B. Dhayal, A. Dougless, S. Gokhale,A. Jain, V. Javvaji, K. Kamisetty, G. Kim, J. Kpetehoto, C. Kuan,C. Lin,G. Liu, Y. Ma, G. Mcpherson, S. Mokler,Christopher Perini,R. Ramaswamy,Bernhard Sell, R. Subramaniam,James Waldemer, D. Wei, Y. Yang, J. Yaung,B. Sabi,S. Natarajan Symposium on VLSI Technology(2024)
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MIM Capacitors,Ergogenic,Noise Suppression,Voltage Sag,Moore’s Law,Impedance,Data Rate,System Software,Production Performance,Processing Nodes
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