CMOS Scaling by Nanosheet Device Architectures and Backside Engineering

N. Horiguchi,H. Mertens,R. Ritzenthaler,S. Subramanian,P. Weckx,P. Schuddinck,A. Veloso,S. Yang,K. Serbulova,J. Ryckaert

2024 INTERNATIONAL VLSI SYMPOSIUM ON TECHNOLOGY, SYSTEMS AND APPLICATIONS, VLSI TSA（2024）

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关键词

Device Architecture,CMOS Scaling,Nanosheet Devices,Voltage Drop,Variety Of Components,Direct Contact,Integration Scheme,Power Line,Integration Of Sequences

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