Synchronous Rectification for a Two-Transformer Active-Clamp Forward-Flyback Converter to Remove Voltage Spikes

The paper proposes a new synchronous rectification (SR) for a two-transformer active-clamp forward-flyback converter (ACFF). The proposed method synchronizes the overlapped turn-on interval of SR field effect transistors (FETs) to the falling edge of the primary-side gate signals. The proposed method eliminates the voltage spike of SR FETs in discontinuous conduction mode. The interval of the overlap is fixed regardless of the input voltage or output power of the converter. This requires no additional voltage or current sensing and saves the computational resources of microcontroller unit. The performance of the proposed SR is verified by an 800 V-14 V 100-W prototype two-transformer ACFF.