Design Considerations and Their Optimization for a Two-Level GaN-Based Current Source Inverter¹

The paper presents an application of GaN devices for the development of a three-phase two-level current source inverter (CSI). Its high frequency operation at extreme low temperatures can offer higher power efficiencies and densities because of improved performance of GaN devices and inductive DC link storage elements. However, higher power rating CSI with paralleled GaN devices together with symmetrical and optimized power loop, and overall converter structure. An imbalanced and larger power loop can result in severe device overshoots, imbalanced switching loss distribution and imbalanced ripple across output voltage. However, less efforts have been spent to understand the intricacies of a CSI. This article presents a comprehensive study of all the layout induced challenges in a CSI using parallel-connected GaN devices by introducing multiple objectives. Furthermore, the impact of passive phase has also been recognized leading to modified double pulse test. The paper develops two different converter structures with state-of-the-art symmetrical power loop inductance of 3.98 nH and parasitics capacitance of 6.22 pF, and therefore improved output voltage quality. Numerous hardware results together with continuous operation of converter were presented till 100 V with peak value of measured efficiencies around 97.63 % to prove the process of optimization.