A D-Band 28 nm CMOS-Bulk Power Amplifier with 12.8 dBm Output Power and 31.3 GHz 3 dB Bandwidth

We present a 2-way, 4-stage power amplifier (PA) in TSMC's 28nm CMOS-bulk technology. The D-Band PA consists of three capacitively-neutralized, common-source (CS) gain stages in conjunction with a cascode output stage. All stages are realized differentially with the interstage match, DC-block and bias voltages provided via the use of transformers. The PA achieves a saturated maximum output power of 12.8 dBm, small signal gain of above 36 dB, and 3 dB bandwidth of 31.3 GHz covering the range of 106-137.3 GHz. Its power consumption of 286mW is derived from a dual-supply of 0.9/1.8V with a current of 119 mA/99.5 mA, respectively. A maximum PAE of 6% was determined from these values. The total PA takes up 0.32mm2 including the in- and output pads.