Hardware Implementation of SP-N and FN for Lightweight Algorithms in IoT Devices

In this paper, we delve into the realm of lightweight cryptography algorithms, specifically focusing on the Light Encryption Device (LED) block cipher with its Substitution-permutation network (SP-N) structure and the Simeck algorithm employing the Feistel Network (FN) structure. Our research carries substantial significance as we endeavor to introduce innovative hardware architectures for each of these algorithms, subsequently subjecting them to rigorous performance analysis within resource-constrained contexts, utilizing the Pynq Z2 platform. Our approach entails the meticulous implementation of these hardware designs in Very high speed integrated circuit Hardware Description Language (VHDL), accompanied by exhaustive assessments encompassing critical parameters such as occupied surface area, operating frequency, throughput, and energy consumption. Through our in-depth analysis, we not only shed light on the efficiency of the LED block cipher and the Simeck algorithm but also emphasize their suitability for resource-limited environments, drawing distinctions and comparisons based on their respective SP-N and FN structures. The outcomes of our study offer valuable insights that go beyond theoretical considerations. They provide practical guidance for informed decision-making when contemplating the implementation of these algorithms in real-world scenarios, taking into account the nuances and performance characteristics associated with the SP-N and FN structures. Our work serves as a pivotal contribution to the field, underlining the importance of tailored hardware designs for lightweight cryptographic algorithms in resource-constrained settings.