Investigation of dual work function metal (DWFM) gate stacks with ALD TaAlN and TaAlC for multi threshold voltages (VTHs) engineering in MOS device integration

This study investigates methods to modulate the effective work function (EWF) and control the multiple threshold voltages (VTHs) of metal-oxide-semiconductor (MOS) devices by applying metal electrodes with different work function materials (WFMs), including a single layer of n-type (TaAlC) and p-type (TaAlN) as well as their stacked structures, through atomic layer deposition (ALD). Dual-Work-Function-Metal (DWFM) gate is a crucial aspect of confirming the feasibility of metal gate stacks in MOS devices for a complementary metal-oxide-semiconductor (CMOS) integration scheme. The gate stack structure of p-Si/IL (Inter layer)/HfO2/DWFM (p/n-type compatible metal stack)/W exhibits good adhesion and even chemical composition distribution, as evidenced by transmission electron microscope (TEM) and energy dispersive spectrometer (EDS) analysis. By fabricating MOS capacitors using this WFM structure and extracting EWF from the measured capacitance-voltage (C–V) characteristics, EWF values of 4.62 eV and 4.99 eV were identified both before and after annealing using forming gas, indicating pWFM-like properties. These properties are attributed to the strengthened Al–O bonds and reduced CO peaks seen in x-ray photoelectron spectroscopy (XPS) analysis. The use of different Ta precursor from Tris(diethylamido)(tert-butylimido)tantalum(V) (TBTDET) as well as TaCl5 resulted in the increase of the EWF following the unique p-WFM like feature. As candidates for WFM electrode in metal-oxide-semiconductor field effect transistor (MOSFET) with the DWFMs (n/p stacks) were evaluated, resulting in a VTH of 0.84 V that places in the middle of the VTH shift range from 0.6 V (nWFM) to 1.16 V (pWFM), approximately. The DWFMs allow for modulation of the EWF, which in turn reduces ambiguity in addressing replacement metal gate (RMG) challenges and opens up new avenues for achieving multi-VTH solutions in CMOS integration schemes.