Signal Integrity Analysis of High-speed PCIe Channel with Board-to-Board Interconnect for High-Performance Server

2023 IEEE Electrical Design of Advanced Packaging and Systems (EDAPS)(2023)

引用 0|浏览0
暂无评分
摘要
In this paper, we analyzed high-speed peripheral component interconnect express (PCIe) channel with board-to-board (B2B) interconnect considering signal integrity for high-performance server. The physical length of the PCIe channel with different B2B interconnects, corresponding to cable type and connector type, is designed. Each component of the PCIe channel including the interposer, package, PCB, cable, and connector is modeled by a 3D electromagnetic (3D-EM) solver and commercial reference. The electrical characteristics of cable-type and connector-type PCIe channels are analyzed in the frequency and time domains. As a result, the cable-type PCIe channel shows higher eye height and width than the connector-type at 32 Gbps due to the small loss despite the high impedance discontinuity and the stub effect of the connector.
更多
查看译文
关键词
Board-to-board interconnect,high-speed channel,peripheral component interconnect express,signal integrity
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要