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14.5 A 12nm Linux-SMP-Capable RISC-V SoC with 14 Accelerator Types, Distributed Hardware Power Management and Flexible NoC-Based Data Orchestration

Maico Cassel dos Santos,Tianyu Jia,Joseph Zuckerman,Martin Cochet,Davide Giri,Erik Jens Loscalzo,Karthik Swaminathan,Thierry Tambe,Jeff Jun Zhang,Alper Buyuktosunoglu,Kuan-Lin Chiu,Giuseppe Di Guglielmo,Paolo Mantovani,Luca Piccolboni,Gabriele Tombesi,David Trilla,John-David Wellman,En-Yu Yang,Aporva Amarnath,Ying Jing,Bakshree Mishra, Joshua Park,Vignesh Suresh,Sarita V. Adve,Pradip Bose,David Brooks,Luca P. Carloni,Kenneth L. Shepard,Gu-Yeon Wei

IEEE International Solid-State Circuits Conference（2024）

Cited 8|Views53
Key words
Energy Efficiency,Communication Channels,Global Budget,Hardware Accelerators,Decentralized Control,External Memory,Academic Team,On-chip Memory,Software Stack,Parallel Applications,Time-to-digital Converter,L2 Cache,Kernel Computation,Memory Hierarchy,Open-source Hardware
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