Performance improvement of enhancement-mode GaN-based HEMT power devices by employing vertical gate structure and composite interlayers

Zhonghao Sun,Jianxun Dai,Huolin Huang,Sun Nan, Jiayu Zhang, Yun Lei, Dawei Li,Kaiming Ma, Huimin Yu,Yanhong Liu, Hui Huang,Yung Chii Liang

Semiconductor Science and Technology(2024)

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摘要
Abstract In this work, the p-n junction vertical gate (JVG) and polarization junction vertical gate (PVG) structures are for the first time proposed to improve the performances of GaN-based enhancement-mode (E-mode) HEMT devices. Compared with the control group featuring the vertical gate structure, highly improved threshold voltage (Vth) and breakdown voltage (BV) are achieved with the assistance of the extended depletion regions formed by inserting single or composite interlayers. The structure dimensions and physical parameters for device interlayers are optimized by TCAD simulation to adjust the spatial electric field distribution and hence improve the device off-state characteristics. The optimal JVG-HEMT device can reach a Vth of 3.4 V, a low on-state resistance (Ron) of 0.64 mΩ·cm2, and a BV of 1245 V, while the PVG-HEMT device exhibits a Vth of 3.7 V, a Ron of 0.65 mΩ·cm2, and a BV of 1184 V, which could be further boosted when additional field plate design is employed. Thus, the figure-of-merit value of JVG- and PVG-HEMT devices rise to 2.4 and 2.2 GW/cm2, respectively, much higher than that for VG-HEMT control group (1.0 GW/cm2). The work provides a novel technical approach to realize higher-performance E-mode HEMTs.
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