A Fast SIE Solver with Cut Set Analysis and Terminals As Supernodes for Interconnects
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS（2024）
Key words
Integrated circuit interconnections,Surface impedance,Mathematical models,Voltage,Integrated circuit modeling,Integrated circuits,Integral equations,Cut set analysis (CSA),interconnects,parameter extraction,precorrected Fast Fourier Transform (pFFT),supernode,surface integral equation (SIE)
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