Depolarization Field Engineered Ferroelectric Mechanical Transistor With 0.3-Volts V_DD

We propose a novel technology called depolarization field engineered ferroelectric mechanical transistor (Fe-MT), which achieves an exceptionally low operating voltage (V-DD) of 0.3 volts. This achievement of VDD scaling is made possible by utilizing depolarization voltage with an amplitude of 11/-11.1 V for the pre-shrinkage of contact gap (g(C)) [Fig. 1], which is activated by a + 63/-66 V pulse stimulus. Additionally, our Fe-MTs maintain the device level reconfigurability between N/P modes. This exciting development suggests that our Fe-MTs can serve as the fundamental building blocks for future generations of integrated circuits with high energy and area-efficiency.