Gear-Ratio-Aware Standard Cell Layout Framework for DTCO Exploration

2023 ACM/IEEE SYSTEM LEVEL INTERCONNECT PATHFINDING WORKSHOP, SLIP 2023(2023)

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摘要
With advances in lithography technology, the minimum metal pitch (MP) becomes smaller than the contacted poly pitch (CPP). This difference has long prompted the need to seek an optimal ratio between CPP and MP. Automated cell synthesis with conditional design rules offers a valuable lever to speed up the technology exploration process and to identify the best "gear ratio" (GR) for Design-Technology Co-optimization (DTCO) exploration. Existing approaches for cell layout generation frameworks have primarily supported uniform grids with limited gear ratio options. In this work, we present SMTCell, a new exploratory framework for cell layout generation that allows flexible gear ratio options using a graph-based data structure. We employ distance-based objective functions and conditional design rule parameters to adapt to varying pitch values. This approach enables us to investigate and discover optimal layouts under diverse technology node settings. An acceleration feature drastically trims the solution space, resulting in a speed increase of up to 19x without sacrificing the quality of the original solutions. With SMTCell, cell synthesis automation can be configured to accommodate a wide range of design choices. We conduct an empirical study to assess the impact of gear ratio at block-level synthesis, place and route (SP&R) outcomes, with the ultimate goal of identifying the most effective technology and standard cell configurations in terms of design power, performance and area (PPA) metrics.
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关键词
standard cell layout,Satisfiability modulo theories,Design technology co-optimization
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