A Novel Linear Filter for Incremental Delta-Sigma ADC Based on Modified Least Squares Algorithm

This paper introduces a novel algorithm for optimizing the coefficients of the digital filters used in incremental delta-sigma analog-to-digital converters (IDSC). This algorithm is modified from constrained linear least squares (LS) to improve the signal-to-noise-and-distortion ratio (SNDR) of IDSC and minimize the oversampling rate (OSR) of the modulator, which enhances system speed and reduces power consumption. In the case of the same SNDR, the first-order IDSC with the proposed filter can reduce the OSR of the modulator by 50 pJ/conv .