Area and Power Efficient Differential Programmable Delay Cell
2023 IEEE 20th India Council International Conference (INDICON)(2023)
摘要
This work presents an all-digital differential programmable delay circuit for time domain applications, namely, time-to-digital converter and temperature sensor. The proposed differential delay circuit has eight different delay modes depending on the choice of select lines S
2
S
1
S
0
. At 90-nm CMOS, 0.6 V supply voltage and 27°C the delay ranges between 18.32 ns to 113.96 ns at modes 0 and 7, respectively. Besides, the power consumption is noted between 2.74 μW to 2.14 μW at modes 0 and 7, respectively. The differential delay cell designed for the purpose of temperature sensor occupies a layout area of 0.0072 mm
2
.
更多查看译文
关键词
differential programmable delay,delay chain,delay chain selector,multiplexer
AI 理解论文
溯源树
样例
![](https://originalfileserver.aminer.cn/sys/aminer/pubs/mrt_preview.jpeg)
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要