Power Consumption Estimation Method of Power ASIC Based on FPGA

To improve the accuracy of integrated circuit power consumption estimation, a power ASIC power consumption estimation method based on FPGA is proposed in this paper. The hardware structure of FPGA is analyzed, the internal structure diagram of FPGA is given, and the working principle of power ASIC is analyzed. The CMOS nonlinear delay model is used to calculate the integrated circuit power consumption, and the static power consumption and dynamic power consumption are obtained according to FPGA. Finally, the total power consumption estimation result of power ASIC based on FPGA is obtained. The experimental results show that the accuracy of integrated circuit power estimation is 93%, and the time-consuming of integrated circuit power estimation is only 8 s. This method can effectively improve the effect of integrated circuit power estimation.