Low voltage (<1.8 V) and high endurance (>1M) 1-Selector/1-STT-MRAM with ultra-low (1 ppb) read disturb for high density embedded memory arrays
2023 International Electron Devices Meeting (IEDM)(2023)
摘要
Integrating STT-MRAM with low voltage 2-terminal selector is a promising approach to boost embedded memory integration density. This work presents a new low voltage 1-Selector/1-STT-MRAM (1S1R) device based on SiNGeCTe (SNGCT) chalcogenide threshold selector. Remarkable 1S1R device performance is demonstrated under voltage pulse operation. For the first time, 1e9 read disturb- free cycles are experimentally demonstrated in STT-MRAM-based 1S1R. Moreover, the new device proves low voltage, high speed, low write error rate (<9 ppm at 1.7 V/ 50 ns), along with excellent write endurance (>1M cycles).
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关键词
Low Voltage,High Endurance,Memory Array,Read Disturbance,Dichalcogenides,Under Voltage,Pulsed Operation,Cycling,I-V Curves,Current Devices,Spin Transfer Torque,Read Voltage,Switching Memory,Switching Transition
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