SOS Pseudo-FeFETs after Furnace or Rapid Annealings and Thining by Thermal Oxidation

•SOS structures produced by Si layer transfer on C-sapphfire with 20 nm hafnia interlayers demonstrate the high level compressive stress.•The stable ferroelectric hysteresis was observed in the SOS pseudo-MOSFETs with HfO2:Al2O3 (10:1) interlayers up to the 1000oC annealing.•The annealing at 1100oC or Si layer stepwise thermal oxidation/etching below 100 nm thickness lead to interface trap assisted hysteresis in the Ids-Vg transfer curves.