Gate Driver Optimization to Suppress Bridge-Leg Crosstalk and Gate-Source Voltage Oscillation for SiC MOSFET

The emergence of the third generation of wide-bandwidth semiconductor based on silicon carbide (SiC) propels the development of power electronic converters towards high power density, high frequency, and small volume. Due to the influence of higher switching speed and parasitic parameters, the bridge-leg crosstalk and gate-source voltage oscillation are more severe. In this paper, the bridge-leg crosstalk and gate-source voltage oscillation of SiC MOSFETs are studied. In order to suppress positive and negative crosstalk separately, a novel gate driver was proposed based on the application of a multi-level turn-off gate voltage, which added an additional new auxiliary circuit with a triode series-connected capacitor between the gate-source terminals to lower the gate driver impedance. Then the equivalent model of the driving circuit was established as well as the design principle of the capacitance. Finally, a double-pulse testing platform was built to verify the effectiveness of the proposed gate driver. The results demonstrated that the proposed gate driver can effectively suppress crosstalk and gate-source voltage oscillation, while reducing switching loss and switching delay.