A 206-264 GHz Power Amplifier Based on a High-Linearity Cascode Core With 15 dB Gain and 12.2-dBm P_sat in 130-nm SiGe BiCMOS

A 206-264 GHz wideband power amplifier (PA) with high gain, and high output power for a sub-terahertz (sub-THz) high-data-rate communication system is presented. The balanced architecture is employed for power combining while maintaining wideband performance. To enhance the performance of the sub-THz PA, the output power and the small-signal gain characteristics of the differential cascode core with feedback inductors are analyzed in detail. A high-linearity cascode core with a sufficient gain is proposed. Based on the analysis, the cascode core in the last stage can be designed with high output power while that in the driver stages can be designed with sufficient gain and output power. A wideband output matching network is introduced to provide wide output power bandwidth. High quality factor (Q-factor) cross-fingers capacitor using only thick metal layers is proposed to reduce the insertion loss (IL) of the inter-stage matching network and therefore enhance the gain and efficiency of the PA. The proposed PA exhibits a measured small-signal gain of 15 dB with a 3-dB bandwidth (BW) of 58 GHz from 206 GHz to 264 GHz. The measured return losses are better than 10 dB across the bandwidth. The measured P _sat is 12.2 dBm at 262 GHz and the P _sat 3-dB bandwidth is 64 GHz (26.7%) from 208 GHz to 272 GHz. The measured OP _1dB of 9.46 dBm and the peak PAE of 1.75% are achieved at 252 GHz. The power consumption is around 784 mW.